SMC Presentation Summary - Keith Cook, Micron

Keith Cook, Senior Director of Technology Development, Micron, presented forecast information for Memory markets. Technology is the Main Memory growth driver in the near term as NAND goes into 2Xnm nodes and DRAN hits 3Xnm. The main challenges are Performance, Shrink, Equipment capability and, as always, especially for Memory, Cost. The Technology Scaling Challenges are broadening, including Isolation structure Aspect Rations reaching 20:1 as the 3Xnm node is crossed, magnifying associated structural and mechanical issues. Both DRAM and NAND are facing generic problems such as Interference issues due to noise from closely space structures. This is being addressed with new materials and architectures. Air Gaps are being looked at as a viable solution. The progress of Vertical (3-D) NAND technology was presented, which has short-term benefits but may face similar aspect ratio limits in fairly short order going forward. It does allow scaling without EUV litho, which offers incentive. Updates on the progress of Capacitorless DRAM was reviewed, which is [possibly limited to a single generation of new devices. No clear winning technologies were identified to deal with the expanding demands on Memory devices. The complexity of the Memory Market is being served by specialized sub-segments going forward.

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